The present invention relates to semiconductor design technology, and more particularly, to a pumping voltage generation circuit of an internal voltage generation circuit, for performing a charge pumping operation to generate a pumping voltage higher than an external power voltage.
Generally, an internal voltage generation circuit for more efficient power consumption is mounted inside a semiconductor device including double data rate synchronous dynamic random access memory (DDR SDRAM) to generate internal voltages of various voltage levels. These internal voltages include a core voltage and a peri voltage having voltage levels between an external power voltage and a ground voltage, a pumping voltage having a voltage level higher than an external power voltage, and a substrate bias voltage having a voltage level lower than the ground voltage. Generally, the pumping voltage and the substrate bias voltage are generated by performing a charge pumping operation. Hereinafter, a pumping voltage generation circuit for generating an internal voltage through the charge pumping operation will be described.
FIG. 1 is a block diagram of a typical pumping voltage generation circuit.
Referring to FIG. 1, the pumping voltage generation circuit includes a voltage level detector 110, an oscillation signal generator 130, and a pumping voltage generator 150.
The voltage level detector 110 detects a voltage level difference between a reference voltage V_REF and a fed-back pumping voltage V_PP and outputs the detected voltage level difference as a detection signal V_DET. The oscillation signal generator 130 receives the detection signal V_DET and performs an oscillation operation to generate an oscillation signal OSC of a predetermined frequency. The pumping voltage generator 150 receives an oscillation signal OSC and performs a charge pumping operation to generate a pumping voltage V_PP.
Since the detailed circuit configurations of the voltage level detector 110, the oscillation signal generator 130, and the pumping voltage generator 150 are already known in the art, detailed description thereof will be omitted and an operation thereof will be briefly described below.
When the voltage level of the pumping voltage V_PP is lower than that of the reference voltage V_REF, the voltage level detector 110 detects this lowered voltage level, and outputs a detection signal V_DET of, for example, a logic high level. The oscillation signal generator 130 receives this detection signal V_DET and performs an oscillation operation to generate an oscillation signal OSC of a predetermined frequency. The pumping voltage generator 150 performs a charge pumping operation in response to this oscillation signal OSC. Therefore, the voltage level of the pumping voltage V_PP is increased more and more.
When the voltage level of the pumping voltage V_PP is higher than that of the reference voltage V_REF, the voltage level detector 110 outputs a detection signal V_DET of a logic low level in response thereto. The oscillation signal generator 130 receives this detection signal V_DET and does not perform an oscillation operation. Therefore, the voltage level of the pumping voltage V_PP is not increased any more compared to the reference voltage V_REF.
Meanwhile, the pumping voltage generator 150 uses a trippler type pumping circuit and manages a pumping voltage V_PP that is four times higher than a maximum external power voltage. For reference, the pumping voltage generator 150 performs a charge pumping operation in response to the rising edge and the falling edge of an oscillation signal OSC. At this point, noise usually occurs in the generated pumping voltage V_PP.
Meanwhile, semiconductor devices are being developed in the direction of high integration and large capacity, and thus more and more circuits use a pumping voltage V_PP . Therefore, pumping voltage generation circuits that generate a pumping voltage V_PP also increase. Accordingly, noise occurring in the pumping voltage V_PP also increases. In other words, a plurality of pumping voltage generation circuits are provided and simultaneously driven to generate a pumping voltage V_PP. That is, all of the pumping voltage generation circuits perform a charge pumping operation in response to a rising edge, and perform a charge pumping operation in response to a falling edge. For example, when each pumping voltage generation circuit generates a pumping voltage V_PP having a constant noise in response to a rising edge, a very large noise is generated in a finally generated pumping voltage V_PP.
The pumping voltage V_PP in which a noise has seriously occurred may cause a malfunction to a circuit using the pumping voltage V_PP. For reference, a DDR SDRAM inputting/outputting data at high speed defines ‘tDV’ as its specification in association with a valid data window. A noise occurring in the pumping voltage V_PP is closely related to ‘tDV’. Therefore, to stably secure ‘tDV’, it is indispensable to reduce a noise of the pumping voltage V_PP as much as possible.
Also, providing a plurality of pumping voltage generation circuits in a limited space may act as much burden when a semiconductor is designed. In case of having to provide a plurality of pumping voltage generation circuits, a net die yield per wafer may be reduced.